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TPA2010D1YZFT Scheda tecnica(PDF) 4 Page - Texas Instruments |
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TPA2010D1YZFT Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 23 page www.ti.com FUNCTIONAL BLOCK DIAGRAM _ + _ + _ + _ + 150 k Ω 150 k Ω _ + _ + Deglitch Logic Deglitch Logic Gate Drive Gate Drive VDD OC Detect Startup Protection Logic Ramp Generator Biases and References TTL Input Buffer SD *Gain = 2 V/V B1, B2 VDD A3 VO- C3 VO+ A2, B3 GND C1 IN- A1 IN+ C2 SHUTDOWN 300 k Ω Notes: * Total gain = 150 k Ω RI 2 x 150 k Ω RI *Gain = TPA2010D1 SLOS417B – OCTOBER 2003 – REVISED JULY 2006 Terminal Functions TERMINAL I/O DESCRIPTION NAME YEF, YZF IN– C1 I Negative differential input IN+ A1 I Positive differential input VDD B1 I Power supply VO+ C3 O Positive BTL output GND A2, B3 I High-current ground VO- A3 O Negative BTL output SHUTDOWN C2 I Shutdown terminal (active low logic) PVDD B2 I Power supply 4 Submit Documentation Feedback |
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