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54LVX4245_993 Scheda tecnica(PDF) 1 Page - National Semiconductor (TI) |
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54LVX4245_993 Scheda tecnica(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page 54LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE® Outputs General Description The LVX4245 is a dual-supply, 8-bit translating transceiver that is designed to interface between a 5V bus and a 3V bus in a mixed 3V/5V supply environment. The Transmit/Receive (T/R) input determines the direction of data flow. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a TRI-STATE condition. The A port interfaces with the 5V bus; the B port interfaces with the 3V bus. The LVX4245 is suitable for mixed voltage applications such as systems using 3.3V memories which must interface with existing buses or other components operating at 5.0V. Features n Bidirectional interface between 5V and 3V buses n Control inputs compatible with TTL level n 5V data flow at A port and 3V data flow at B port n Outputs source/sink 24 mA n Available in Ceramic DIP and Flatpack packages n Implements patented EMI reduction circuitry n Functionally compatible with the 54 series 245 n Standard Microcircuit Drawing (SMD) 5962-9860601 Ordering Code Order Number Package Number Package Description 54LVX4245J-QML J24F 24-Lead Ceramic Dual-in-line 54LVX4245W-QML W24C 24-Lead Cerpack Logic Symbol Pin Descriptions Pin Names Description OE Output Enable Input T/R Transmit/Receive Input A 0–A7 Side A Inputs or TRI-STATE Outputs B 0–B7 Side B Inputs or TRI-STATE Outputs Connection Diagram TRI-STATE® is a registered trademark of National Semiconductor DS101021-1 Pin Assignment for CDIP and Cerpack DS101021-2 March 1999 © 2001 National Semiconductor Corporation DS101021 www.national.com |
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