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TMP105 Scheda tecnica(PDF) 11 Page - Burr-Brown (TI) |
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TMP105 Scheda tecnica(HTML) 11 Page - Burr-Brown (TI) |
11 / 16 page TMP105 SLLS648B − FEBRUARY 2005 − REVISED JANUARY 2006 www.ti.com 11 Frame 1 Two−Wire Slave Address Byte Frame 2 Pointer Register Byte Frame4DataByte2 1 Start By Master ACK By TMP105 ACK By TMP105 ACK By TMP105 Stop By Master 19 1 1 D7 D6 D5 D4 D3 D2 D1 D0 9 Frame3Data Byte 1 ACK By TMP105 1 D7 SDA (Continued) SCL (Continued) D6 D5 D4 D3 D2 D1 D0 9 9 SDA SCL 0 0 1 0 0 A0 R/W 0 0 000 0 P1 P0 … … Figure 5. Two-Wire Timing Diagram for TMP105 Write Word Format Frame 1 Two−Wire Slave Address Byte Frame 2 Pointer Register Byte 1 Start By Master ACK By TMP105 ACK By TMP105 Frame3Two−WireSlave Address Byte Frame 4Data Byte1ReadRegister Start By Master ACK By TMP105 ACK By Master From TMP105 19 1 9 19 1 9 SDA SCL 0 0 R/W 0 00 00 0 P1 P0 … … … … SDA (Continued) SCL (Continued) SDA (Continued) SCL (Continued) 1 001 00 A0 00 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Frame 5 Data Byte2ReadRegister Stop By Master ACK By Master From TMP105 19 D7 D6 D5 D4 D3 D2 D1 D0 Figure 6. Two-Wire Timing Diagram for Read Word Format |
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