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AD7999YRJZ-1 Scheda tecnica(PDF) 8 Page - Analog Devices |
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AD7999YRJZ-1 Scheda tecnica(HTML) 8 Page - Analog Devices |
8 / 25 page AD7991/AD7995/AD7999 Preliminary Technical Data Rev.PrB | Page 8 of 25 Parameter Y Version Unit Test Conditions/Comments POWER REQUIREMENTS VDD 2.7/5.5 V min/max IDD Digital inputs = 0 V or VDD ADC Operating, Interface Active 0.06/0.1 mA max VDD = 3.3 V/5.5 V, 400 kHz fSCL 0.3/0.6 mA max VDD = 3.3 V/5.5 V, 3.4 MHz fSCL Power Down, Interface Active TBD mA max VDD = 3.3 V/5.5 V, 400 kHz fSCL TBD mA max VDD = 3.3 V/5.5 V, 3.4 MHz fSCL Power-Down , Interface Inactive 1/2 µA max VDD = 3.3 V/5.5 V Power Dissipation Fully Operational mW max VDD = 3.3 V/5.5 V, 400 kHz fSCL mW max VDD = 3.3 V/5.5 V, 3.4 MHz fSCL ADC Operating, Interface Active 0.495/2.2 mW max VDD = 3.3 V/5.5 V, 400 kHz fSCL 1.98/6.05 mW max VDD = 3.3 V/5.5 V, 3.4 MHz fSCL Power Down, Interface Inactive 3.3/11 µW max VDD = 3.3 V/5.5 V 1 Max/min AC dynamic performance, INL and DNL specifications are typical specifications when operating in Mode 2 with I2C Hs-mode SCL frequencies. Specifications outlined for Mode 2 apply to Mode 3 also. Sample delay and bit trial delay enabled. 2 See the Terminology section 3 Guaranteed by Initial Characterization. |
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