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AD5522JSVUZ Scheda tecnica(PDF) 1 Page - Analog Devices |
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AD5522JSVUZ Scheda tecnica(HTML) 1 Page - Analog Devices |
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1 / 45 page  Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs Preliminary Technical Data AD5522 Rev.PrL Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. FEATURES Quad Parametric Measurement Unit FV, FI, FN, MV, MI Functions 4 Programmable Current Ranges (Internal RSENSE) 5uA, 20uA, 200uA and 2mA 1 Programmable Current Range up to 64mA (external RSENSE) 22.5 V FV Range with Asymmetrical Operation Integrated 16-Bit DACs Provide Programmable Levels Offset and Gain Correction on Chip Low Capacitance Outputs Suited to Relay Less Systems On-chip Comparators Per Channel FI Voltage Clamps & FV Current Clamps Guard Drive Amplifier System PMU connections Programmable Temperature Shutdown Feature SPI/Microwire/DSP & LVDS Compatible Interfaces Compact 80 lead TQFP Package with Exposed Pad (Top Or Bottom) APPLICATIONS Automatic Test Equipment (ATE) per pin Parametric Measurement Unit Continuity & Leakage Testing Device Power Supply Instrumentation SMU (Source Measure Unit) Precision Measurement PRODUCT OVERVIEW The AD5522 is a high performance, highly integrated parametric measurement unit consisting of four independent channels. Each PPMU channel includes five, 16-bit, voltage out DACs setting the programmable inputs levels for the force voltage input, clamp and comparator inputs (high and low). Five programmable force and measure current ranges are available ranging from 5µA to 64mA. Four of these ranges use on chip sense resistors, while a high current range up to 64mA is available per channel using off chip sense resistors. Currents in excess of 64mA require an external amplifier. Low capacitance DUT connections (FOH, EXT FOH) ensure the device is suited to relay less test systems. The PMU functions are controlled via a simple three wire serial interface compatible with SPI/QSPI/Microwire and DSP interface standards. Interface clocks of 50MHz allow fast updating of modes. LVDS (Low Voltage Differential Signaling) interface protocol at 100MHz is also supported. Comparator outputs are provided per channel for device go no-go testing and characterization. Control registers provide easy way of changing force or measure conditions, DAC levels and selected current ranges. SDO (serial data out) allows the user to readback information for diagnostic purposes. 16 16 16 DUTGND MEASVH (0-3) GUARD (0-3) CGALM SCLK SYNC SDI SDO CPOL0/ SCLK CPOL2 /CPO0 SERIAL INTERFACE CPOH0/ SDI CPOL1/ SYNC CPOH1/ SDO LVDS/ SPI RESET BUSY 16 CLAMP & GUARD ALARM CPOH2 /CPO1 CPOL3 /CPO2 CPOH3 /CPO3 POWER ON RESET GUARDIN (0-3)/ DUTGND (0-3) DUT EXTERNAL RSENSE (CURRENTS UP TO 64mA) EXTMEASIH(0-3) EXTMEASIL(0-3) FOH(0-3) EXTFOH(0-3) CFF(0-3) FIN CLH CLL AVSS(0-4) AGND (0-3) AVDD(0-4) + - MEASOUT (0-3) x4 DGND CPH COMPARATOR CCOMP (0-3) LOAD CPL INTERNAL RANGE SELECT (5uA, 20uA, 200uA, 2mA) - - - - - - + + + + + + RSENSE - - + + 16 16 16 16 TEMP SENSOR VREF SYS_FORCE SYS_SENSE DVCC 16 X1 REG CREG MREG 16 16 16 16 16 16 16 16 16-Bit FIN DAC x5 or x10 *2 x1 TMPALM AGNDx REFGND 16-Bit CLH DAC 10k Ω MEASOUT MUX & GAIN x1/x0.2 X1 REG CREG MREG X1 REG CREG MREG 16 *2 16 16 16 16 X1 REG CREG MREG *6 *6 OFFSET DAC 16-Bit OFFSET DAC TO ALL DAC OUTPUT AMPLIFIERS FORCE AMPLIFER MEASURE CURRENT IN AMP 16-Bit CLL DAC 16-Bit CPH DAC 16-Bit CPL DAC AGNDx SW 1 SW 2 SW 3 SW 4 60 Ω SW 6 SW 5 SW 9 SW 8 SW 7 SW 10 SW 11 MEASURE VOLTAGE IN AMP TEMP SENSOR TO MEASOUT MUX SW 12 X1 REG CREG MREG *6 X2 REG X2 REG X2 REG *6 X2 REG X2 REG *6 *6 *2 *2 AGND EN 1k Ω GUARD AMP SW 13 SW 14 AGNDx 10k Ω SW 15 SW 16 DUTGND OFFSET DAC BIAS TO CENTER IRANGE Figure 1. Functional Block Diagram |
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