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ADF7020-1BCPZ Scheda tecnica(PDF) 7 Page - Analog Devices |
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ADF7020-1BCPZ Scheda tecnica(HTML) 7 Page - Analog Devices |
7 / 48 page ADF7020-1 Rev. 0 | Page 7 of 48 Min Typ Max Unit Test Conditions Parameter POWER SUPPLIES Voltage Supply VDD 2.3 3.6 V All VDD pins must be tied together Transmit Current Consumption FRF = 315 MHz, VDD = 3.0 V, PA is matched to 50 Ω 433 MHz, 0 dBm/5 dBm/10 dBm 13/16/21 mA VCO_BIAS_SETTING = 2 Receive Current Consumption Low Current Mode 17.6 mA VCO_BIAS_SETTING = 2 High Sensitivity Mode 20.1 mA VCO_BIAS_SETTING = 2 Power-Down Mode Low Power Sleep Mode 0.1 1 μA 1 Higher data rates are achievable, depending on local regulations. 2 For definition of frequency deviation, see the Register 2—Transmit Modulation Register (FSK Mode) section. 3 For definition of GFSK frequency deviation, see the Register 2—Transmit Modulation Register (GFSK/GOOK Mode) section. 4 Measured as maximum unmodulated power. Output power varies with both supply and temperature. 5 For matching details, see the LNA/PA Matching section. 6 Sensitivity for combined matching network case is typically 2 dB less than separate matching networks. See Table 11 for sensitivity values at various data rates and frequencies. 7 See Table 6 for a description of different receiver modes. 8 Follow the matching and layout guidelines to achieve the relevant FCC/ETSI specifications. 9 This figure can be used to calculate the in-band phase noise for any operating frequency. Use the following equation to calculate the in-band phase noise performance as seen at the PA output: –198 + 10 log(fPFD) + 20 log N. |
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