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ST20GP6X33S Scheda tecnica(PDF) 11 Page - STMicroelectronics

Il numero della parte ST20GP6X33S
Spiegazioni elettronici  GPS PROCESSOR
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
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3
Digital signal processing module
The ST20-GP6 chip includes 12 channel GPS correlation DSP hardware. It is designed to handle
twelve satellites, two of which can be initialized to support the RTCA-SC159 specification.
The digital signal processing (DSP) module extracts GPS data from the incoming IF (Intermediate
Frequency) data. There are a number of stages of processing involved; these are summarized
below and in Figure 3.1. After the 12 pairs of hardware correlators, the data for all channels are
time division multiplexed onto the appropriate internal buses (i.e. values for each channel are
passed in sequence, for example: I1, Q1, I2, Q2 ... I12, Q12, I1, Q1).
Figure 3.1 DSP module block diagram
The main stages of processing are as follows:
Data sampling
This stage removes any meta-stability caused by the asynchronous input data coming from an
analogue source (the radio receiver). The data at this point consists of a carrier of nominally
4.092 MHz with a bandwidth of approximately
±1 MHz.
This stage is common to all 12 channels.
I correlator
(x 12)
Q correlator
(x 12)
frequency
converter A
frequency
converter B
accumulator
ST20 CPU accessible
data
sampler
4 MHz IF
input
generator
(x 12)
Numerically
controlled
oscillator
registers
Pseudo random
noise sequence
DMA
interface


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