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74HCT4515PW Scheda tecnica(PDF) 8 Page - NXP Semiconductors |
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74HCT4515PW Scheda tecnica(HTML) 8 Page - NXP Semiconductors |
8 / 8 page September 1993 8 Philips Semiconductors Product specification 4-to-16 line decoder/demultiplexer with input latches; inverting 74HC/HCT4515 AC WAVEFORMS PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. Fig.6 Waveforms showing the input (An, LE, E) to output (Qn) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the minimum pulse width of the latch enable input (LE) and the set-up and hold times for LE to An. Set-up and hold times are shown as positive values but may be specified as negative values. The shaded areas indicate when the input is permitted to change for predictable output performance. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. |
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