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74ALVCH32501EC Scheda tecnica(PDF) 11 Page - NXP Semiconductors |
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74ALVCH32501EC Scheda tecnica(HTML) 11 Page - NXP Semiconductors |
11 / 16 page 2000 Mar 16 11 Philips Semiconductors Product specification 36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state 74ALVCH32501 handbook, full pagewidth MNA566 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH OEBA input VOL VOH VCC VM VM OEAB input GND tPZL tPZH VM VM VCC VM VX VY VI 2.3 to 2.7 V 0.5 × VCC VOL + 150 mV VOH − 150 mV VCC 2.7 V 1.5 V VOL + 300 mV VOH − 300 mV 2.7 V 3.0 to 3.6 V 1.5 V VOL + 300 mV VOH − 300 mV 2.7 V VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 3-state enable and disable times. handbook, full pagewidth th tsu th tsu VM VM MNA567 GND VI GND VI nLEAB, nLEBA, nCPAB, nCPBA input nAn, nBn input Fig.7 Data set-up and hold times for the nAn and nBn inputs to the nLEAB, nLEBA, nCPAB and nCPBA inputs. VCC VM VI 2.3 to 2.7 V 0.5 × VCC VCC 2.7 V 1.5 V 2.7 V 3.0 to 3.6 V 1.5 V 2.7 V VOL and VOH are typical output voltage drop that occur with the output load. The shaded areas indicate when the input is permitted to change for predictable output performance. |
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