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74ABTH16273 Scheda tecnica(PDF) 6 Page - NXP Semiconductors |
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74ABTH16273 Scheda tecnica(HTML) 6 Page - NXP Semiconductors |
6 / 10 page Philips Semiconductors Product specification 74ABT16273 74ABTH16273 16-bit D-type flip-flop 1998 Feb 27 6 AC SETUP REQUIREMENTS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25°C VCC = +5.0V Tamb = –40 to +85 °C VCC = +5.0V ±0.5V UNIT MIN TYP MIN tS(H) tS(L) Setup time, High or Low nDx to nCP 3 2.0 2.0 1.0 1.0 2.0 2.0 ns th(H) th(L) Hold time, High or Low nDx to nCP 3 0 0 –0.6 –0.6 0 0 ns tW(H) tW(L) Clock pulse width High or Low 1 3.3 3.3 1.2 1.0 3.3 3.3 ns tW(L) Master Reset pulse width, Low 2 3.3 1.1 3.3 ns tREC Recovery time nMR + nCP 2 2.0 0.0 2.0 ns AC WAVEFORMS VM = 1.5V, VIN = GND to 2.7V VM tPLH tPHL VM VM VM nCP nQx 1/fMAX tW(H) tW(L) SH00056 VOL VOH 0V VM Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency VM nMR VM nQx tw(L) VM tPHL VM tREC nCP SH00057 0V 0V VOH VOL Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM nDx VM VM VM VM nCP ts(H) th(H) ts(L) th(L) SH00058 VM 0V 0V Waveform 3. Data Setup and Hold Times |
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