UC1608
128x240 Matrix LCD Controller-Drivers
(Revision 0.52 Preview)
7
CONTROL REGISTERS
UC1608 contains registers which control the chip operation. These registers can be modified by commands.
The following table is a summary of the control registers, their meaning and their default value. The
commands supported by UC1608 are described in the next two sections, first a summary table, followed by
a detailed description.
Name:
The Symbolic reference of the register byte.
Note that, some symbol names refer to collection of bits (flags) within one register byte.
Default:
Numbers shown in Bold fonts are values after Power-Up-Reset and System-Reset..
Name
Bits
Default
Description
SL
6
0H
Start Line. Mapping from COM1 to Display Data RAM.
CR
8
0H
Return Column Address. Useful for cursor implementation.
CA
8
0H
Display Data RAM Column Address
(Used in Host to Display Data RAM access)
PA
4
0H
Display Data RAM Page Address
(Used in Host to Display Data RAM access)
BR
2
2H
Bias Ratio. The ratio between VLCD and VBIAS.
00b= 10.7
01b= 11.3
10b=12.0
11b= 12.7
TC
2
0H
Temperature Compensation (per
oC).
00b: 0.0%
01b: -0.05%
10b: -0.1%
11b: -0.2%
GN
2
3H
Gain, coarse setting of VBIAS and VLCD
PM
6
0H
Electronic Potentiometer to fine tune VBIAS and VLCD
MR
1
1H
Multiplexing Rate: Number of pixel rows:
0b: 96
1b: 128
OM
2
–
Operating Modes (Read Only)
10b: Sleep
11b: Normal
01b: (Not used)
00b: Reset
BZ
1
–
Busy with internal processes (reset, changing mode, etc.)
OK for Display RAM read/write access.
RS
1
–
Reset in progress, Host Interface not ready
PC
3
7H
Power Control and panel loading.
PC[0]:
0b: LCD: <20nF
1b: LCD: >20nF
PC[2:1]: 00b: External VLCD
11b: Internal VLCD
01b and 10b are reserved, for UltraChip only. Please do not use.
APC0
8
2CH
Advanced Product Configuration. For UltraChip only. Please do not use.