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ADM1068ACP-REEL Scheda tecnica(PDF) 4 Page - Analog Devices

Il numero della parte ADM1068ACP-REEL
Spiegazioni elettronici  Super Sequencer??and Monitor
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Homepage  http://www.analog.com
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ADM1068ACP-REEL Scheda tecnica(HTML) 4 Page - Analog Devices

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ADM1068
Preliminary Technical Data
Rev. PrB | Page 4 of 28
SPECIFICATIONS
VH = 3.0 V to 14.4 V1, VPn = 3.0 V to 6.0 V1, TA = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER SUPPLY ARBITRATION
VH, VPn
3.0
V
Minimum supply required on one of VPn, VH
VP
6.0
V
Maximum VDDCAP = 5.1 V, typical
VH
14.4
V
VDDCAP = 4.75 V
VDDCAP
2.7
4.75
5.4
V
Regulated LDO output
CVDDCAP
10
µF
Minimum recommended decoupling capacitance
POWER SUPPLY
Supply Current, IVH, IVPn
4.2
6
mA
VDDCAP = 4.75 V, PDO1–8 off
Additional Currents
All PDO FET Drivers On
1
mA
VDDCAP = 4.75 V, PDO1–6 loaded with 1 µA each,
PDO7–8 off
Current Available from VDDCAP
2
mA
Maximum additional load that can be drawn from
all PDO pull-ups to VDDCAP
EEPROM Erase Current
10
mA
1 ms duration only, VDDCAP = 3 V
SUPPLY FAULT DETECTORS
VH Pin
Input Attenuator Error
±0.05
%
Midrange
±0.05
%
High range
Detection Ranges
High Range
6
14.4
V
Midrange
2.5
6
V
VPn Pins
Input Attenuator Error
±0.1
%
Low range and midrange
Detection Ranges
Midrange
2.5
6
V
Low Range
1.25
3
V
Ultralow Range
0.573
1.375
V
No input attenuation error
VX Pins
Input Impedance
1
MΩ
Detection Ranges
Ultralow Range
0.573
1.375
V
No input attenuation error
Absolute Accuracy
±1
%
VREF error + DAC nonlinearity + comparator offset
error
Threshold Resolution
8
Bits
Digital Glitch Filter
0
µs
Minimum programmable filter length
100
µs
Maximum programmable filter length
REFERENCE OUTPUT
Reference Output Voltage
2.043
2.048
2.053
V
No load
Load Regulation
−0.25
mV
Sourcing current, IDACnMAX = −100 µA
0.25
mV
Sinking current, IDACnMAX = 100 µA
Minimum Load Capacitance
1
µF
Capacitor required for decoupling, stability
Load Regulation
2
mV
Per 100 µA
PSRR
60
dB
dc


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