ULTRACHIP
High-Voltage Mixed-Signal IC
©1999-2003
8
Product Specifications
Name
Bits
Default
Description
OM
2
–
Operating Modes (Read Only)
10b: Sleep
11b: Normal
01b: (Not used)
00b: Reset
BZ
1
–
Busy with internal processes (reset, changing mode, etc.)
OK for Display RAM read/write access.
RS
1
Reset in progress, Host Interface not ready
PC
3
7H
Vlcd pump control.
PC[0]:
0b:Low LCD loading
1b: Regular LCD loading
PC[2:1]:
00b: External Vlcd
01b: 4x
10b: 5x
11b: 6x
APC0
8
6CH
Advanced Product Configuration. For UltraChip only. Please do not use.
DC
3
0H
Display Control:
DC[0]: PXV: Pixels Inverse (Default: OFF)
DC[1]: APO: All Pixels ON (Default:: OFF)
DC[2]: Display ON/OFF (Default:: OFF).
AC
4
0H
Address Control:
AC[0]: WA: Automatic column/page Wrap Around (Default 0:OFF)
AC[1]: Reserved (always set to 0)
AC[2]: PID: PA (page address) auto increment direction (0: +1 1: -1)
AC[3]: CUM: Cursor update mode, (Default 0:OFF)
when CUM=1, CA increment on write only, wrap around suspended
LC
4
0H
LCD Mapping Control:
LC[0]: MSF: MSB First mapping Option
LC[1]: Reserved (always set to 0)
LC[2]: MX, Mirror X (Column sequence inversion)
LC[3]: MY, Mirror Y (Row sequence inversion)