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Z0220516SSCR4259TR Scheda tecnica(PDF) 10 Page - Zilog, Inc. |
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Z0220516SSCR4259TR Scheda tecnica(HTML) 10 Page - Zilog, Inc. |
10 / 30 page Z02205 Modem Controller ZiLOG 8 PS001000-MOD0599 Additional Timing Table (SCLK/TCLK = XTAL/2) Note TA = 0°C to +70°C [3] 16 MHz No Symbol Parameter VCC Min Max Units Notes 1 TpC Input Clock Period 5.5V 62.5 DC ns 1,7 5.5V 250 DC ns 1,8 2 TrC,TfC Clock Input Rise & Fall Times 5.5V 15 ns 1 3 TwC Input Clock Width 5.5V 31 ns 1 5.5V 125 ns 1,8 4 TwTinL Timer Input Low Width 5.5V 70 ns 1 5 TwTinH Timer Input High Width 5.5V 5TpC 1 6 TpTin Timer Input Period 5.5V 8TpC 1 7 TrTin, TfTin Timer Input Rise & Fall Timer 5.5V 100 ns 1 8A TwIL Int. Request Low Time 5.5V 70 ns 1,2 8B TwIL Int. Request Low Time 5.5V 5TpC 1,3 9 TwIH Int. Request Input High Time 5.5V 5TpC 1,2 10 Twsm Stop-Mode Recovery Width Spec 5.5V 12 ns 11 Tost Oscillator Startup Time 5.5V 5TpC 4 D1, D0 [Note] 12 Twdt Watch-Dog Timer Delay Time before time-out 5.5V 3.5 ms 0, 0 [5] 5.5V 7 ms 0, 1 [5] 5.5V 14 ms 1, 0 [5] 5.5V 56 ms 1, 1 [5] 13 TPOR Power-On Reset Delay 5.5V 1.5 13 ms Notes:: 1. Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0. 2. Interrupt request via Port 3 (P31–P33). 3. Interrupt request via Port 3 (P30). 4. SMR–D5 = 0. 5. Reg. WDTMR. 6. The VDD voltage specification of 5.5V guarantees 5.0V ± 0.5V. 7. Standard Oscillator mode, Pcon RegD7=1. 8. Maximum frequency for external XTAL Clock is 4MHz when using low EMI oscillator mode, Pcon Reg D7=0. |
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