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MC141556P Scheda tecnica(PDF) 2 Page - Freescale Semiconductor, Inc |
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MC141556P Scheda tecnica(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 18 page MC141556 2 MOTOROLA Figure1. BLOCK DIAGRAM Root VSS DP0 DM0 OSC2 OSC1 VDD 2 4 6 7 1 VDD3CAP Hub (SIE) IICEN 5 8 3 Controller Port Clock Doubler Power Supply & 3.3V Regulator 3.3 Volts Serial Interface Engine Frame Counter (1ms) 48MHz DM5/SEL0 DP5/SEL1 25 27 28 OVR5/GANG/SCL PWRSW5/SDA 26 Repeater PORT 5 Downstream IIC Module DM4 DP4 21 23 24 OVR4 PWRSW4 22 PORT 4 Downstream DM3 DP3 17 19 20 OVR3 PWRSW3 18 PORT 3 Downstream DM2 DP2 13 15 16 OVR2 PWRSW2 14 PORT 2 Downstream DM1 DP1 9 11 12 OVR1 PWRSW1 10 PORT 1 Downstream Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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