MMDF3N03HD

http://onsemi.com

5

t, TIME

Figure 7. Reverse Recovery Time (trr)

di/dt = 300 A/µs

Standard Cell Density

High Cell Density

tb

trr

ta

trr

SAFE OPERATING AREA

The Forward Biased Safe Operating Area curves define

the maximum simultaneous drain–to–source voltage and

drain current that a transistor can handle safely when it is

forward biased. Curves are based upon maximum peak

junction temperature and a case temperature (TC) of 25°C.

Peak repetitive pulsed power limits are determined by using

the thermal response data in conjunction with the procedures

discussed in AN569, “Transient Thermal Resistance –

General Data and Its Use.”

Switching between the off–state and the on–state may

traverse any load line provided neither rated peak current

(IDM) nor rated voltage (VDSS) is exceeded, and that the

transition time (tr, tf) does not exceed 10 µs. In addition the

total power averaged over a complete switching cycle must

not exceed (TJ(MAX) – TC)/(R

θJC).

A power MOSFET designated E–FET can be safely used

in switching circuits with unclamped inductive loads. For

reliable operation, the stored energy from circuit inductance

dissipated in the transistor while in avalanche must be less

than the rated limit and must be adjusted for operating

conditions differing from those specified. Although industry

practice is to rate in terms of energy, avalanche energy

capability is not a constant. The energy rating decreases

non–linearly with an increase of peak current in avalanche

and peak junction temperature.

Although many E–FETs can withstand the stress of

drain–to–source avalanche at currents up to rated pulsed

current (IDM), the energy rating is specified at rated

continuous current (ID), in accordance with industry

custom. The energy rating must be derated for temperature

as shown in the accompanying graph (Figure 9). Maximum

energy at currents below rated continuous ID can safely be

assumed to equal the values indicated.

Figure 8. Capacitance Variation

GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)

Qg, TOTAL GATE CHARGE (nC)

02

4

6

8

ID = 3 A

TJ = 25°C

VGS

6

3

0

12

9

24

18

12

6

0

VDS

QT

Q1

Q2

Q3

10

12

10

0

10

15

25

VGS

VDS

TJ = 25°C

VDS = 0 V VGS = 0 V

1000

800

600

400

200

0

20

Ciss

Coss

Crss

55

Ciss

Crss

30

Figure 9. Gate–to–Source and

Drain–to–Source Voltage versus Total Charge

1200