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M41T00SM6E Scheda tecnica(PDF) 11 Page - STMicroelectronics

Il numero della parte M41T00SM6E
Spiegazioni elettronici  Serial Access Real-Time Clock
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M41T00S
CLOCK OPERATION
The 8-byte Register Map (see Table 2) is used to
both set the clock and to read the date and time
from the clock, in a binary coded decimal format.
Seconds, Minutes, and Hours are contained within
the first three registers.
Bits D6 and D7 of Clock Register 02h (Century/
Hours Register) contain the CENTURY ENABLE
Bit (CEB) and the CENTURY Bit (CB). Setting
CEB to a '1' will cause CB to toggle, either from '0'
to '1' or from '1' to '0' at the turn of the century (de-
pending upon its initial state). If CEB is set to a '0,'
CB will not toggle. Bits D0 through D2 of Register
03h contain the Day (day of week). Registers 04h,
05h, and 06h contain the Date (day of month),
Month and Years. The eighth clock register is the
Calibration Register (this is described in the Clock
Calibration section). Bit D7 of Register 00h con-
tains the STOP Bit (ST). Setting this bit to a '1' will
cause the oscillator to stop. If the device is expect-
ed to spend a significant amount of time on the
shelf, the oscillator may be stopped to reduce cur-
rent drain. When reset to a '0' the oscillator restarts
within one second.
The seven Clock Registers may be read one byte
at a time, or in a sequential block. The Calibration
Register (Address location 07h) may be accessed
independently. Provision has been made to as-
sure that a clock update does not occur while any
of the seven clock addresses are being read. If a
clock address is being read, an update of the clock
registers will be halted. This will prevent a transi-
tion of data during the READ.
Clock Registers
The M41T00S offers 8 internal registers which
contain Clock and Calibration data. These regis-
ters are memory locations which contain external
(user accessible) and internal copies of the data
(usually referred to as BiPORTTIMEKEEPER
cells). The external copies are independent of in-
ternal functions except that they are updated peri-
odically by the simultaneous transfer of the
incremented internal copy. The internal divider (or
clock) chain will be reset upon the completion of a
WRITE to any clock address.
The system-to-user transfer of clock data will be
halted whenever the address being read is a clock
address (00h to 06h). The update will resume ei-
ther due to a Stop Condition or when the pointer
increments to any non-clock address (07h).
Clock Registers store data in BCD. The Calibra-
tion Register stores data in Binary Format.
Table 2. TIMEKEEPER® Register Map
Keys: 0 = Must be set to '0'
CB = Century Bit
CEB = Century Enable Bit
FT = Frequency Test Bit
OF = Oscillator Fail Bit
OUT = Output level
S = Sign Bit
ST = Stop Bit
Addr
Function/Range BCD
Format
D7
D6
D5
D4
D3
D2
D1
D0
00h
ST
10 Seconds
Seconds
Seconds
00-59
01h
OF
10 Minutes
Minutes
Minutes
00-59
02h
CEB
CB
10 Hours
Hours (24 Hour Format)
Century/
Hours
0-1/00-23
03h
000
00
Day of Week
Day
01-7
04h
0
0
10 Date
Date: Day of Month
Date
01-31
05h
0
0
0
10M
Month
Month
01-12
06h
10 Years
Year
Year
00-99
07h
OUT
FT
S
Calibration
Calibration


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