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CA1391E Scheda tecnica(PDF) 4 Page - Harris Corporation

Il numero della parte CA1391E
Spiegazioni elettronici  TV Horizontal Processors
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Produttore elettronici  HARRIS [Harris Corporation]
Homepage  http://www.harris.com
Logo HARRIS - Harris Corporation

CA1391E Scheda tecnica(HTML) 4 Page - Harris Corporation

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Application Information
Circuit Operation (See Schematic Diagram)
The CA1391 and CA1394 contain the oscillator, phase
detector, and predriver sections necessary for the television
horizontal oscillator and AFC loop.
The oscillator is an RC type with Terminal 7 used to control the
timing. If it is assumed that Q7 is initially off, then an external
capacitor connected from Terminal 7 to ground charges through
an external resistance connected between Terminals 6 and 7. As
soon as the voltage at Terminal 7 exceeds the potential set at the
base of Q8 by resistors R11 and R12, Q7 turns on, and Q6 sup-
plies base current to Q5 and Q10. Transistor Q5 discharges the
capacitor through R4 until the base bias of Q7 falls below that of
Q8 at which time, Q7 turns off, and the cycle repeats.
The sawtooth generated at the base of Q4 appears across R3
and turns off Q3 whenever the sawtooth voltage rises to a value
that exceeds the bias set at Terminal 8. By adjusting the poten-
tial at Terminal 8, the duty cycle at the pre-drive output (Termi-
nal 1) may be changed. The phase detector is isolated from the
remainder of the circuit by R31, Z2, Q15 and Q16. The phase
detector consists of the comparator Q22 and Q23, and the
gated current source Q18. Negative going sync pulses at Ter-
minal 3 turn off Q17, and the current division between Q22 and
Q23 is then determined by the phase relationship of the sync
and the sawtooth waveform at Terminal 4, which is derived from
the horizontal flyback pulse. If there is no phase difference
between the sync and sawtooth, equal currents flow in the col-
lectors of Q22 and Q23 during each half of the sync pulse
period. The current in Q22 is turned around by current mirror
Q20 and Q21 so that there is no net output current at Terminal 5
for balanced conditions. When a phase offset occurs, current
flows either in or out of Terminal 5. In circuit applications, this
terminal is connected to Terminal 7 through an external low
pass filter, thereby controlling the oscillator.
Shunt regulation for the circuit is obtained by using a VBE
and zener multiplier. Resistors R13 and R14 multiply the VBE
of Q11, and the ratio of R15 and R16 multiplies the voltage of
the zener diode Z1.
POSITIVE PULSE WIDTH AT TERMINAL 1 (
µs)
70
60
50
40
30
20
10
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
TA = 25
oC
FREE RUNNING FREQUENCY = 15734Hz
FIGURE 2. DUTY CYCLE AT THE PRE-DRIVE OUTPUT (TERMINAL
1) AS IT IS AFFECTED BY THE INPUT AT TERMINAL 8
87
6
5
4
3
2
1
CA1394
2
470
µF
0.47
µF
0.01
µF
3k
620
24V
V+
470pF
120k
6800pF
14k
2.7k
2.4k
1.5k
4k
10W
0.001
µF
+150V
270
1.2k
0.0027
µF
150k
8.2k
0.1
µF
0.1
µF
390k
3.9k
22
7.5k
SYNC
20VP-P
5
µs
60VP-P
10
µs
FIGURE 3. TYPICAL CIRCUIT APPLICATION
CA1391, CA1394


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