Motore di ricerca datesheet componenti elettronici |
|
ST7DALI Scheda tecnica(PDF) 47 Page - STMicroelectronics |
|
ST7DALI Scheda tecnica(HTML) 47 Page - STMicroelectronics |
47 / 141 page ST7DALI 47/141 I/O PORTS (Cont’d) Figure 30. I/O Port General Block Diagram Table 8. I/O Port Mode Options Legend: NI - not implemented Off - implemented not activated On - implemented and activated Note: The diode to VDD is not implemented in the true open drain pads. A local protection between the pad and VOL is implemented to protect the de- vice against positive stress. Configuration Mode Pull-Up P-Buffer Diodes to VDD to VSS Input Floating with/without Interrupt Off Off On On Pull-up with/without Interrupt On Output Push-pull Off On Open Drain (logic level) Off True Open Drain NI NI NI (see note) DR DDR OR PAD VDD ALTERNATE ENABLE ALTERNATE OUTPUT 1 0 OR SEL DDR SEL DR SEL PULL-UP CONDITION P-BUFFER (see table below) N-BUFFER PULL-UP (see table below) 1 0 ANALOG INPUT If implemented ALTERNATE INPUT VDD DIODES (see table below) FROM OTHER BITS EXTERNAL REQUEST (eix) INTERRUPT SENSITIVITY SELECTION CMOS SCHMITT TRIGGER REGISTER ACCESS BIT From on-chip periphera l To on-chip peripheral Note: Refer to the Port Configuration table for device specific information. Combinational Logic 1 |
Codice articolo simile - ST7DALI |
|
Descrizione simile - ST7DALI |
|
|
Link URL |
Privacy Policy |
ALLDATASHEETIT.COM |
Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |