Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

TP3054N-X Scheda tecnica(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Il numero della parte TP3054N-X
Spiegazioni elettronici  Extended Temperature Serial Interface CODEC/Filter COMBO Family
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

TP3054N-X Scheda tecnica(HTML) 4 Page - National Semiconductor (TI)

  TP3054N-X Datasheet HTML 1Page - National Semiconductor (TI) TP3054N-X Datasheet HTML 2Page - National Semiconductor (TI) TP3054N-X Datasheet HTML 3Page - National Semiconductor (TI) TP3054N-X Datasheet HTML 4Page - National Semiconductor (TI) TP3054N-X Datasheet HTML 5Page - National Semiconductor (TI) TP3054N-X Datasheet HTML 6Page - National Semiconductor (TI) TP3054N-X Datasheet HTML 7Page - National Semiconductor (TI) TP3054N-X Datasheet HTML 8Page - National Semiconductor (TI) TP3054N-X Datasheet HTML 9Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 16 page
background image
Functional Description (Continued)
LONG FRAME SYNC OPERATION
To use the long frame mode, both the frame sync pulses,
FS
X and FSR, must be three or more bit clock periods long,
with timing relationships specified in Figure 3. Based on the
transmit frame sync, FS
X, the COMBO will sense whether
short or long frame sync pulses are being used. For 64 kHz
operation, the frame sync pulse must be kept low for a
minimum of 160 ns. The D
X TRI-STATE output buffer is
enabled with the rising edge of FS
X or the rising edge of
BCLK
X, whichever comes later, and the first bit clocked out
is the sign bit. The following seven BCLK
X rising edges clock
out the remaining seven bits. The D
X output is disabled by
the falling BCLK
X edge following the eighth rising edge, or by
FS
X going low, whichever comes later. A rising edge on the
receive frame sync pulse, FS
R, will cause the PCM data at
D
R to be latched in on the next eight falling edges of BCLKR
(BCLK
X in synchronous mode). All four devices may utilize
the long frame sync pulse in synchronous or asynchronous
mode.
In applications where the LSB bit is used for signalling, with
FS
R two bit clock periods long, the decoder will interpret the
lost LSB as “12” to minimize noise and distortion.
TRANSMIT SECTION
The transmit section input is an operational amplifier with
provision for gain adjustment using two external resistors,
see Figure 4. The low noise and wide bandwidth allow gains
in excess of 20 dB across the audio passband to be realized.
The op amp drives a unity-gain filter consisting of RC active
pre-filter, followed by an eighth order switched-capacitor
bandpass filter clocked at 256 kHz. The output of this filter
directly drives the encoder sample-and-hold circuit. The A/D
is of companding type according to µ-law (TP3054) or A-law
(TP3057) coding conventions. A precision voltage reference
is trimmed in manufacturing to provide an input overload
(t
MAX) of nominally 2.5V peak (see table of Transmission
Characteristics). The FS
X frame sync pulse controls the
sampling of the filter output, and then the successive-
approximation encoding cycle begins. The 8-bit code is then
loaded into a buffer and shifted out through D
X at the next
FS
X pulse. The total encoding delay will be approximately
165 µs (due to the transmit filter) plus 125 µs (due to encod-
ing delay), which totals 290 µs. Any offset voltage due to the
filters or comparator is cancelled by sign bit integration.
RECEIVE SECTION
The receive section consists of an expanding DAC which
drives a fifth order switched-capacitor low pass filter clocked
at 256 kHz. The decoder is A-law (TP3057) or µ-law
(TP3054) and the 5th order low pass filter corrects for the sin
x/x attenuation due to the 8 kHz sample/hold. The filter is
then followed by a 2nd order RC active post-filter/power
amplifier capable of driving a 600
Ω load to a level of 7.2
dBm. The receive section is unity-gain. Upon the occurrence
of FS
R, the data at the DR input is clocked in on the falling
edge of the next eight BCLK
R (BCLKX) periods. At the end of
the decoder time slot, the decoding cycle begins, and 10 µs
later the decoder DAC output is updated. The total decoder
delay is
∼10 µs (decoder update) plus 110 µs (filter delay)
plus 62.5 µs (12 frame), which gives approximately 180 µs.
www.national.com
4


Codice articolo simile - TP3054N-X

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
National Semiconductor ...
TP3054N NSC-TP3054N Datasheet
250Kb / 16P
   Enhanced Serial Interface CODEC/Filter COMBO Family
logo
Texas Instruments
TP3054N/NOPB TI1-TP3054N/NOPB Datasheet
323Kb / 18P
[Old version datasheet]   Enhanced Serial Interface CODEC/Filter COMBO Family
More results

Descrizione simile - TP3054N-X

Produttore elettroniciIl numero della parteScheda tecnicaSpiegazioni elettronici
logo
Texas Instruments
TP3054-X TI1-TP3054-X_15 Datasheet
1Mb / 22P
[Old version datasheet]   Extended Temperature Serial Interface CODEC/Filter COMBO Family
TP3052-X TI1-TP3052-X Datasheet
393Kb / 20P
[Old version datasheet]   TP3054-X, TP3057-X Extended Temperature Serial Interface CODEC/Filter COMBO Family
TP3057WMX TI1-TP3057WMX Datasheet
299Kb / 18P
[Old version datasheet]   Enhanced Serial Interface CODEC/Filter COMBO Family
logo
National Semiconductor ...
TP3054 NSC-TP3054 Datasheet
250Kb / 16P
   Enhanced Serial Interface CODEC/Filter COMBO Family
logo
Texas Instruments
TP3054 TI1-TP3054_11 Datasheet
323Kb / 18P
[Old version datasheet]   Enhanced Serial Interface CODEC/Filter COMBO Family
logo
STMicroelectronics
ETC5054 STMICROELECTRONICS-ETC5054 Datasheet
153Kb / 18P
   SERIAL INTERFACE CODEC/FILTER
logo
National Semiconductor ...
TP3064 NSC-TP3064 Datasheet
276Kb / 18P
   Enhanced' Serial Interface CMOS CODEC/Filter COMBO
TP3069 NSC-TP3069 Datasheet
275Kb / 18P
   Enhanced' Serial Interface CMOS CODEC/Filter COMBO
logo
Texas Instruments
TP3064 TI1-TP3064_11 Datasheet
347Kb / 20P
[Old version datasheet]   Enhanced Serial Interface CMOS CODEC/Filter COMBO
logo
National Semiconductor ...
TP3051 NSC-TP3051 Datasheet
414Kb / 10P
   PARALLEL INTERFACE CODEC/FILTER COMBO
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Scheda tecnica Scarica

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEETIT.COM
Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com