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MC1066 Scheda tecnica(PDF) 6 Page - ON Semiconductor |
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MC1066 Scheda tecnica(HTML) 6 Page - ON Semiconductor |
6 / 16 page MC1066 http://onsemi.com 6 SMBus PORT AC TIMING (VDD = 3.3 V, –55°C ≤ (TA = TJ) ≤ 125°C; CL = 80 pF, unless otherwise noted.) Symbol Characteristic Min Typ Max Unit fSMB SMBus Clock Frequency 10 — 100 kHz tLOW Low Clock Period (10% to 10%) 4.7 — — msec tHIGH High Clock Period (90% to 90%) 4 — — msec tR SMBus Rise Time (10% to 90%) — — 1,000 nsec tF SMBus Fall Time (90% to 10%) — — 300 nsec tSU(START) Start Condition Setup Time (90% SCL to 10% SDA) (for Repeated Start Condition) 4 — — msec tH(START) Start Condition Hold Time 4 — — msec tSU–DATA Data in Setup Time 1,000 — — nsec tH–DATA Data in Hold Time 1,250 — — nsec tSU(STOP) Stop Condition Setup Time 4 — — msec tIDLE Bus Free Time Prior to New Transition 4.7 — — msec AB C D E F G H I J K L M ILOW IHIGH t SU–DATA t H–DATA t SU(START) t H(START) t SU(STOP) t IDLE SCL SDA A = Start Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave E = Slave Pulls SDA Line Low F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Slave H = LSB of Data Clocked into Slave I = Slave Pulls SDA Line Low J = Acknowledge Clocked into Master K = Acknowledge Clock Pulse L = Stop Condition, Data Executed by Slave M= New Start Condition AB C D E F G H I J K ILOW IHIGH t SU–DATA t SU(START) t H(START) t SU(STOP) t IDLE SCL SDA A = Start Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave E = Slave Pulls SDA Line Low F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Master H = LSB of Data Clocked into Master I = Acknowledge Clock Pulse J = Stop Condition K = New Start Condition SMBUS Write Timing Diagram SMBUS Read Timing Diagram |
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