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FC9961 Scheda tecnica(PDF) 7 Page - First Silicon Co., Ltd |
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FC9961 Scheda tecnica(HTML) 7 Page - First Silicon Co., Ltd |
7 / 7 page FC9961 2015. 03. 23 7/7 Revision No : 1 PWM Dimming Due to the fast open-loop response of the average-current control loop of the FC9961, its PWM dimming performance nearly matches that of the FC9910B. The inductor current waveform comparison is shown in Fig. 4. Fig.4. Typical PWM dimming response of an FC9961 LED driver. [CH2 (red): PWMD; CH4 (green): Inductor Current; CH3 (blue): Same as FC9910B for comparison] The rising and falling edges are limited by the current slew rate in the inductor. The first switching cycle is terminated upon reaching the 250mV (V LD • 0.181) level at CS. The cir- cuit is further reaching its steady-state within 3~4 switching cycles regardless of the switching frequency. Pin Description Pin # Function Description 8-Lead SOIC 16-Lead SOIC 1 1 VIN This pin is the input of an 8.0 - 450V linear regulator. 2 4 CS This pin is the current sense pin used to sense the FET current by means of an external sense resistor. 3 5 GND Ground return for all internal circuitry. This pin must be electrically con- nected to the ground of the power train. 4 8 GATE This pin is the output GATE driver for an external N-channel power MOSFET. 5 9 PWMD This is the PWM dimming input of the IC. When this pin is pulled to GND, the gate driver is turned off. When the pin is pulled high, the gate driver operates normally. 6 12 VDD This is the power supply pin for all internal circuits. It must be bypassed with a low ESR capacitor to GND (at least 0.1μF). 7 13 LD This pin is the linear dimming input, and it sets the current sense thresh- old as long as the voltage at this pin is less than 1.5V. If voltage at LD falls below 150mV, the GATE output is disabled. The GATE signal recovers at 200mV at LD. 8 14 RT A resistor connected between this pin and GND programs the GATE off- time. - 2, 3, 6, 7, 10, 11, 15, 16 NC No connection |
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Descrizione simile - FC9961 |
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