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GD25D10CPFG Datasheet(Scheda tecnica) 11 Page - GigaDevice Semiconductor (Beijing) Inc.

Numero della parte GD25D10CPFG
Dettagli  3.3V Uniform Sector Standard and Dual Serial Flash
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Produttore  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Homepage  http://www.gigadevice.com/
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3.3V Uniform Sector
Standard and Dual Serial Flash
GD25D10C/05C
11
7. COMMANDS DESCRIPTION
All commands, addresses and data are shifted in and out of the device by the host system, with the most significant
bit first. On the first rising edge of SCLK after CS# is driven low, the one-byte command code must be shifted into the device,
with the most significant bit first on SI, and each bit being latched on the rising edges of SCLK.
See Table2, every command sequence starts with a one-byte command code. Depending on the command, this might
be followed by address bytes, or data bytes, or dummy bytes. CS# must be driven high after the last bit of the command
sequence has been completed.
For the command of Read, Fast Read, Read Status Register or Release from Deep Power-Down, and Read Device
ID, the shifted-in command sequence is followed by a data-out sequence. All read instruction can be completed after any
bit of the data-out sequence is being shifted out, and then CS# must be driven high to return to deselected status.
For the command of Page Program, Sector Erase, Block Erase, Chip Erase, Write Status Register, Write Enable,
Write Disable or Deep Power-Down command, CS# must be driven high exactly at a byte boundary, which means the clock
pulse number should be an exact multiple of eight. Otherwise the command is rejected to executed. Especially for Page
Program command, if at any time the input end is not a completed byte, nothing will be written into the memory array, neither
would WEL bit be reset.
Table2. Commands
Command Name
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
n-Bytes
Write Enable
06H
Write Disable
04H
Read Status Register
05H
(S7-S0)
(continuous)
Write Status Register
01H
S7-S0
Read Data
03H
A23-A16
A15-A8
A7-A0
(D7-D0)
(Next byte)
(continuous)
Fast Read
0BH
A23-A16
A15-A8
A7-A0
dummy
(D7-D0)
(continuous)
Dual Output
Fast Read
3BH
A23-A16
A15-A8
A7-A0
dummy
(D7-D0)(1)
(continuous)
Page Program
02H
A23-A16
A15-A8
A7-A0
D7-D0
Next byte
Sector Erase
20H
A23-A16
A15-A8
A7-A0
Block Erase(32K)
52H
A23-A16
A15-A8
A7-A0
Block Erase(64K)
D8H
A23-A16
A15-A8
A7-A0
Chip Erase
C7/60 H
Deep Power-Down
B9H
Release From Deep
Power-Down, And
Read Device ID
ABH
dummy
dummy
dummy
(DID7-
DID0)
(continuous)
Release From Deep
Power-Down
ABH
Manufacturer/
Device ID
90H
00H
00H
00H
(MID7-
MID0)
(DID7-
DID0)
(continuous)
Read Identification
9FH
(MID7-
MID0)
(JDID15-
JDID8)
(JDID7-
JDID0)
(continuous)
Read Unique ID
4BH
00H
00H
00H
dummy
(UID7-
UID0)
(continuous)
NOTE:
1. Dual Output data
IO0 = (D6, D4, D2, D0)
O1 = (D7, D5, D3, D1)




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