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GD25D80CSIG Scheda tecnica(PDF) 20 Page - GigaDevice Semiconductor (Beijing) Inc.

Il numero della parte GD25D80CSIG
Spiegazioni elettronici  3.3V Uniform Sector Standard and Dual Serial Flash
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Produttore elettronici  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Homepage  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25D80CSIG Scheda tecnica(HTML) 20 Page - GigaDevice Semiconductor (Beijing) Inc.

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3.3V Uniform Sector
Standard and Dual Serial Flash
GD25D80C
20
7.13.
Deep Power-Down (DP) (B9H)
Executing the Deep Power-Down (DP) command is the only way to enter the lowest consumption mode (the Deep
Power-Down Mode). Unlike deselecting the device by driving CS# high, or entering into the Standby Mode (if there is no
internal cycle currently in progress), the Deep Power-Down Mode provides an extra software protection mechanism while
the device is not in active use. The only access to this mode is by executing the Deep Power-Down (DP) command. Since
in the Deep Power-Down mode, the device ignores all Write, Program and Erase commands. Once the device is in the
Deep Power-Down Mode, all commands are ignored except the Release from Deep Power-Down and Read Device ID (RDI)
command. This releases the device from this mode. The Release from Deep Power-Down and Read Device ID (RDI)
command also allows the Device ID of the device to be output on SO.
The Deep Power-Down Mode automatically stops at Power-Down, and the device always Power-Up in the Standby
Mode. The Deep Power-Down (DP) command is entered by driving CS# low, followed by the command code on SI. CS#
must be driven low for the entire duration of the sequence.
The Deep Power-Down command sequence: CS# goes low  sending Deep Power-Down command  CS# goes
high. The command sequence is shown in Figure13. CS# must be driven high after the eighth bit of the command code has
been latched in; otherwise the Deep Power-Down (DP) command is not executed. As soon as CS# is driven high, it requires
a delay of tDP before the supply current is reduced to ICC2 and the Deep Power-Down Mode is entered. Any Deep Power-
Down (DP) command, while an Erase, Program or Write cycle is in progress, is rejected without having any effects on the
cycle that is in progress.
Figure13. Deep Power-Down Sequence Diagram
Command
0
1
2
3
4
5
6
7
B9H
CS#
SCLK
SI
tDP
Deep Power-down mode


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