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GD25LB32D Scheda tecnica(PDF) 22 Page - GigaDevice Semiconductor (Beijing) Inc.

Il numero della parte GD25LB32D
Spiegazioni elettronici  1.8V Uniform Sector Dual and Quad Serial Flash
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Produttore elettronici  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Homepage  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

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1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LB32D
22
7.6.
Read Data Bytes (READ) (03H)
The Read Data Bytes (READ) command is followed by a 3-byte address (A23-A0), and each bit is latched-in on the
rising edge of SCLK. Then the memory content at that address is shifted out on SO, and each bit is shifted out, at a Max
frequency fR, on the falling edge of SCLK. The first byte addressed can be at any location. The address is automatically
incremented to the next higher address after each byte of data is shifted out. The whole memory can, therefore, be read
with a single Read Data Bytes (READ) command. Any Read Data Bytes (READ) command, while an Erase, Program or
Write cycle is in progress, is rejected without having any effects on the cycle that is in progress.
Figure7. Read Data Bytes Sequence Diagram
Command
0
1
2
3
4
5
6
7
03H
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31 32
MSB
3
2
1
0
34 35 36 37
33
23 22 21
7
6
5
4
3
2
1
0
38 39
24-bit address
MSB
Data Out1
Data Out2
7.7. Read Data Bytes at Higher Speed (Fast Read) (0BH)
The Read Data Bytes at Higher Speed (Fast Read) command is for quickly reading data out. It is followed by a 3-byte
address (A23-A0) and a dummy byte, and each bit is latched-in on the rising edge of SCLK. Then the memory content, at
that address, is shifted out on SO, and each bit is shifted out, at a Max frequency fC, on the falling edge of SCLK. The first
byte addressed can be at any location. The address is automatically incremented to the next higher address after each
byte of data is shifted out.
Figure8. Read Data Bytes at Higher Speed Sequence Diagram
Command
0
1
2
3
4
5
6
7
0BH
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
MSB
34 35 36 37
33
6
5
4
3
2
1
0
38 39
Data Out1
32
42 43 44 45
41
46 47
40
7
6
5
4
3
2
1
0
7
6
5
7
Data Out2
CS#
SCLK
SI
SO
MSB
Dummy Byte


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