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GD25LB32D Scheda tecnica(PDF) 19 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LB32D Scheda tecnica(HTML) 19 Page - GigaDevice Semiconductor (Beijing) Inc. |
19 / 67 page 1.8V Uniform Sector Dual and Quad Serial Flash GD25LB32D 19 7.3. Write Enable for Volatile Status Register (50H) The non-volatile Status Register bits can also be written to as volatile bits. This gives more flexibility to change the system configuration and memory protection schemes quickly without waiting for the typical non-volatile bit write cycles or affecting the endurance of the Status Register non-volatile bits. The Write Enable for Volatile Status Register command must be issued prior to a Write Status Register command, and any other commands can ’t be inserted between them. Otherwise, Write Enable for Volatile Status Register will be cleared. The Write Enable for Volatile Status Register command will not set the Write Enable Latch bit, it is only valid for the Write Status Register command to change the volatile Status Register bit values. Figure4. Write Enable for Volatile Status Register Sequence Diagram CS# SCLK Command(50H) SI SO 0 1 2 3 4 5 6 7 High-Z Figure4a. Write Enable for Volatile Status Register Sequence Diagram (QPI) CS# SCLK IO0 IO1 IO2 IO3 0 1 Command 50H |
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