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GD25LB32D Scheda tecnica(PDF) 17 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LB32D Scheda tecnica(HTML) 17 Page - GigaDevice Semiconductor (Beijing) Inc. |
17 / 67 page 1.8V Uniform Sector Dual and Quad Serial Flash GD25LB32D 17 7.1. Write Enable (WREN) (06H) The Write Enable (WREN) command is for setting the Write Enable Latch (WEL) bit. The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Block Erase (BE), Chip Erase (CE), Write Status Register (WRSR) and Erase/Program Security Registers command. The Write Enable (WREN) command sequence: CS# goes low sending the Write Enable command CS# goes high. Figure2. Write Enable Sequence Diagram Command 0 1 2 3 4 5 6 7 06H CS# SCLK SI SO High-Z Figure2a. Write Enable Sequence Diagram (QPI) CS# SCLK IO0 IO1 IO2 IO3 0 1 Command 06H |
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