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GD25B256D Scheda tecnica(PDF) 75 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25B256D Scheda tecnica(HTML) 75 Page - GigaDevice Semiconductor (Beijing) Inc. |
75 / 82 page 3.3V Uniform Sector Dual and Quad Serial Flash GD25B256D 75 tBE2 Block Erase Time (64K Bytes) 0.22 1 s tCE Chip Erase Time (GD25B256D) 70 200 s Note: 1. Typical value tested at T = 25 ℃. 2. Value guaranteed by design and/or characterization, not 100% tested in production. Figure 76 Serial Input Timing Figure 77 Output Timing Figure 78. Resume to Suspend Timing Diagram CS# Resume Command tRS Suspend Command SCLK CS# SI MSB SO High-Z LSB tCHSL tSLCH tDVCH tCHDX tSHCH tCHSH tCHCL tCLCH tSHSL CS# SCLK SO SI Least significant address bit (LIB) in tCLQV tCLQX tCLQX tCLQV tCLH tCLL tSHQZ LSB |
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