| Selected language |
Italian ▼ |
|
Motore di ricerca datesheet componenti elettronici |
|
GD9FU1G8F2AMG Datasheet(Scheda tecnica) 17 Page - GigaDevice Semiconductor (Beijing) Inc. |
|
||||||||||||||||||||||||||||||
|
|
17 page 
GD9Fx1GxF2A 17 If the host side uses a sequential access time (tRC) of less than 30ns, the data can be latched on the next falling edge of RE# as the waveform of EDO (Extended data output)mode. DOUT0 DOUT1 DOUTn tCHZ CE# RE# R/B# I/Ox tCOH tRP tREH tRR tRLOH tREA tRHOH tRHZ tRC tCEA Figure 12_b: Data Output Cycle figures 7.5 Write Protect The Erase and Program Operations are automatically reset when WP# goes Low. The operations are enabled and disabled as follows. tWW 80h 10h WE# I/Ox WP# R/B# tWW 80h 10h WE# I/Ox WP# R/B# Figure 13_a: Write Protect Disable with program figures Figure 13_b: Write Protect Enable with program figures tWW 60h D0h WE# I/Ox WP# R/B# tWW 60h D0h WE# I/Ox WP# R/B# Figure 13_c: Write Protect Disable with erase figures Figure 13_d: Write Protect Enable with erase figures |
|
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Portuguese
Polish
