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BC41B143A05-IRK-E4 Scheda tecnica(PDF) 10 Page - List of Unclassifed Manufacturers

Il numero della parte BC41B143A05-IRK-E4
Spiegazioni elettronici  BlueCpre 4-ROM Single Chip Bluetooth v2.0 System with EDR
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Produttore elettronici  ETC1 [List of Unclassifed Manufacturers]
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BC41B143A05-IRK-E4 Scheda tecnica(HTML) 10 Page - List of Unclassifed Manufacturers

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6 x 6mm VFBGA Package Information
BC41B143A-ds-001Pe
This material is subject to CSR’s non-disclosure agreement
Production Information
© Cambridge Silicon Radio Limited 2005
Page 10 of 102
2.2
Device Terminal Functions
Radio
Ball
Pad Type
Description
RF_IN
D1
Analogue
Single-ended receiver input
PIO[0]/RXEN
B1
Bi-directional with
programmable strength
internal pull-up/down
Control output for external TX/RX switch (if
fitted)
PIO[1]/TXEN
B2
Bi-directional with
programmable strength
internal pull-up/down
Control output for external PA (if fitted)
TX_A
F1
Analogue
Transmitter output/switched receiver input
TX_B
E1
Analogue
Complement of TX_A
AUX_DAC
D3
Analogue
Voltage DAC output
Synthesiser and
Oscillator
Ball
Pad Type
Description
XTAL_IN
K3
Analogue
For crystal or external clock input
XTAL_OUT
J3
Analogue
Drive for crystal
USB and UART
Ball
Pad Type
Description
UART_TX
J10
CMOS output, tri-state with
weak internal pull-up
UART data output active high
UART_RX
H9
CMOS input with weak
internal pull-down
UART data input active high
UART_RTS
H7
CMOS output, tri-state with
weak internal pull-up
UART request to send active low
UART_CTS
H8
CMOS input with weak
internal pull-down
UART clear to send active low
USB_DP
J8
Bi-directional
USB data plus with selectable internal
1.5k
Ω pull-up resistor
USB_DN
K8
Bi-directional
USB data minus
PCM Interface
Ball
Pad Type
Description
PCM_OUT
G8
CMOS output, tri-state with
weak internal pull-down
Synchronous data output
PCM_IN
G9
CMOS input, with weak
internal pull-down
Synchronous data input
PCM_SYNC
G10
Bi-directional with weak
internal pull-down
Synchronous data sync
PCM_CLK
H10
Bi-directional with weak
internal pull-down
Synchronous data clock


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