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FDG6313N Scheda tecnica(PDF) 4 Page - Fairchild Semiconductor |
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FDG6313N Scheda tecnica(HTML) 4 Page - Fairchild Semiconductor |
4 / 5 page FDG6313N Rev. A Figure 10. Single Pulse Maximum Power Dissipation. Figure 8. Capacitance Characteristics. Figure 7. Gate Charge Characteristics. Figure 9. Maximum Safe Operating Area. Typical Electrical Characteristics (continued) 0.1 1 2 5 10 25 40 0.01 0.02 0.05 0.1 0.2 0.5 1 3 V , DRAI N-SOURCE VOLTAGE (V) DS DC 1s 100ms 10s RDS(ON) LIMIT V = 4.5V SINGLE PULSE R = 415 °C/W T = 25°C GS A θJA 10ms 1ms 0.0001 0.001 0.01 0.1 1 10 100 200 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , TIME (sec) 1 Single Pulse D = 0.5 0.1 0.05 0.02 0.01 0.2 Duty Cycle, D = t / t 1 2 T - T = P * R (t) A J P(pk) t1 t 2 θJA R (t) = r(t) * R R =415 °C/W θJA θJA θJA Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in note 1. Transient thermal response will change depending on the circuit board design. 0.1 0.3 1 2 5 10 25 3 10 30 70 200 V , DRAIN TO SOURCE VOLTAGE (V) DS Ciss f = 1 MHz V = 0V GS Coss Crss 0.0001 0.001 0.01 0.1 1 10 200 0 10 20 30 40 50 SINGLE PULSE TIME (SEC) SINGLE PULSE R =415°C/W T = 25°C θJA A 0 0.4 0.8 1.2 1.6 2 0 1 2 3 4 5 Q , GATE CHARGE (nC) g I = 0.5A D 10V 15V V = 5V DS |
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