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MVTX2802 Scheda tecnica(PDF) 1 Page - Zarlink Semiconductor Inc |
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MVTX2802 Scheda tecnica(HTML) 1 Page - Zarlink Semiconductor Inc |
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1 / 154 page  1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved. Features • 4 Gigabit Ports with GMII and PCS interface - Gigabit Port can also support 100/10 Mbps MII interface - Provide Hot plug support for GMII/PCS module • High Performance Layer 2 Packet Forwarding (11.904M packets per second) and Filtering at Full-Wire Speed • Maximum throughput is 4 Gbps non-blocking • Centralized shared-memory architecture • Consists of two Memory Domains at 133 MHz - Frame Buffer Domain: One bank of ZBT-SRAM with 1M/2MB total - Switch Database Domain with 256K/512K SRAM • Up to 64K MAC addresses to provide large node aggregation in wiring closet switches • Provides Port based and ID Tagged VLAN (IEEE802.1Q) up to 4K VLAN • Support IP Multicast with IGMP snooping up to 64K groups. Traffic Classification • Classify traffic into 8 transmission priorities per port • Supports Delay bounded, Strict Priority, and WFQ • Provides 2 level dropping precedence with WRED mechanism - User controlled thresholds for WRED • Classification based on layer 2, 3 markings - VLAN Priority field in VLAN tagged frame - DS/TOS field in IP packet • The precedence of above two classifications can be programmable October 2003 Ordering Information MVTX2802AG 596 Pin HSBGA -40 °C to +85°C MVTX2802 Managed 4-Port 1000 Mbps Ethernet Switch Data Sheet Figure 1 - MVTX2802AG Functional Block Diagram Frame Data Buffer A ZBT-SRAM (1M/2MB) SRAM 256/512K SW Database MAC Table Frame Engine Scheduler FDB Interface SDB Interface Search Engine 64bit 32bit GMII /PCS Port 0 GMII /PCS Port 1 GMII /PCS Port 2 GMII /PCS Port 3 16/8bit- Bus/ Serial Management Module CPU MVTX2802 LED |
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