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TC1268 Scheda tecnica(PDF) 5 Page - Microchip Technology

Il numero della parte TC1268
Spiegazioni elettronici  500mA Fixed Output, Fast Response CMOS LDO with Shutdown
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Produttore elettronici  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
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© 2002 Microchip Technology Inc.
DS21379B-page 5
TC1268
3.2
Bypass Input
A 10nF capacitor connected from the bypass input to
ground
reduces
noise
present
on
the
internal
reference, which in turn, significantly reduces output
noise. If output noise is not a concern, this input may be
left unconnected. Larger capacitor values may be
used, but this results in a longer time period to achieve
the rated output voltage, once power is initially applied.
3.3
Output Capacitor
A1
µF (min) capacitor from VOUT to ground is required.
The output capacitor should have an effective series
resistance greater than 0.1
Ω and less than 5Ω, and a
resonant frequency above 1MHz. A 1
µF capacitor
should be connected from VIN to GND if there is more
than 10 inches of wire between the regulator and the
AC filter capacitor, or if a battery is used as the power
source. Aluminum electrolytic or tantalum capacitor
types can be used. (Since many aluminum electrolytic
capacitors
freeze
at
approximately
-30°C,
solid
tantalums are recommended for applications operating
below -25°C.) When operating from sources other than
batteries,
supply
noise
rejection
and
transient
response can be improved by increasing the value of
the input and output capacitors and employing passive
filtering techniques.
3.4
ERROR Output
ERROR is driven low whenever VOUT falls out of
regulation by more than -5% (typical). This condition
may be caused by low input voltage, output current
limiting, or thermal limiting.
The ERROR threshold is 5% below rated VOUT,
regardless of the programmed output voltage value
(e.g., ERROR =VOL at 2.375V (typ.) for a 2.5V
regulator). ERROR output operation is shown in
Figure 3-3. Note that ERROR is active when VOUT is at
or below VTH, and inactive when VOUT is above VTH +
VH.
As shown in Figure 3-1, ERROR canbeusedas a
battery low flag, or as a processor RESET signal (with
the addition of timing capacitor C1). R1 x C1 should be
chosen to maintain ERROR below VIH of the processor
RESET input for at least 200msec to allow time for the
system to stabilize. Pull-up resistor R1 can be tied to
VOUT,VIN or any other voltage less than (VIN +0.3V).
FIGURE 3-3:
ERROR OUTPUT
OPERATION
VOUT
VTH
VIH
Hysteresis (VH)
VOL
ERROR


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