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MTV012A Scheda tecnica(PDF) 7 Page - List of Unclassifed Manufacturers |
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MTV012A Scheda tecnica(HTML) 7 Page - List of Unclassifed Manufacturers |
7 / 14 page MYSON TECHNOLOGY MTV012A MTV012A Revision 1.1 12/23/1998 7/14 Self-Test Patterns (2) 4.7 H/V Sync Processor Register Present Check Digital Filter Present Check Vpre Frequency Count Vfreq Polarity Check Vpol High Frequency Mask Vself CVSYNC Polarity Check & Sync Seperator CVpre Hpol Hself Digital Filter Present Check & Frequency Count Hpre Hfreq HBpl VBpl VBLANK HBLANK VSYNC HSYNC H/V SYNC Processor Block Diagram reg name addr bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 PSTUS 40h (r) CVpre X Hpol Vpol Hpre Vpre Hoff Voff HCNTH 41h (r) Hovf X X X X HF10 HF9 HF8 HCNTL 42h (r) HF7 HF6 HF5 HF4 HF3 HF2 HF1 HF0 VCNTH 43h (r) Vovf X X X X X X VF8 VCNTL 44h (r) VF7 VF6 VF5 VF4 VF3 VF2 VF1 VF0 PCTR0 40h (w) C1 C0 HVsel STOsel PREFS HALFV HBpl VBpl PCTR2 42h (w) X X X Selft STbsh Rt1 Rt0 STF P4OUT 44h (w) X X X X X P42 P41 P40 INTFLG 50h (r/w) HPRchg VPRchg HPLchg VPLchg HFchg VFchg FIFOI MI INTEN 60h (w) EHPR EVPR EHPL EVPL EHF EVF EFIFO EMI PSTUS (r): The status of polarity, present and static level for HSYNC and VSYNC. CVpre = 1 → The extracted CVSYNC is present. = 0 → The extracted CVSYNC is not present. Hpol = 1 → HSYNC input is positive polarity. |
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