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LTM4639 Scheda tecnica(PDF) 17 Page - Linear Technology

Il numero della parte LTM4639
Spiegazioni elettronici  Ultrathin, Triple Output, Step-Down 關Module Regulator for DDR-QDR4 Memory
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Produttore elettronici  LINER [Linear Technology]
Homepage  http://www.linear.com
Logo LINER - Linear Technology

LTM4639 Scheda tecnica(HTML) 17 Page - Linear Technology

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LTM4632
17
4632fc
For more information www.linear.com/LTM4632
APPLICATIONS INFORMATION
power loss as that which was simulated. The outcome of
this process and due diligence yields the set of derating
curves provided in other sections of this data sheet. After
these laboratory test have been performed and correlated
to the µModule model, then the θJB and θBA are summed
together to correlate quite well with the µModule model
with no airflow or heat sinking in a properly define cham-
ber. This θJB + θBA value is shown in the Pin Configuration
section and should accurately equal the θJA value because
approximately 100% of power loss flows from the junc-
tion through the board into ambient with no airflow or top
mounted heat sink.
The 1.0V, 1.5V, and 2.5V power loss curves in Figures 9 to
11 can be used in coordination with the load current derat-
ing curves in Figures 12 to 17 for calculating an approxi-
mate θJA thermal resistance for the LTM4632 with no heat
sinking and various airflow conditions. The power loss
curves are taken at room temperature, and are increased
with multiplicative factors of 1.35 assuming junction
temperature at 120°C. The derating curves are plotted
with the output current starting at 6A by putting LTM4632
into two phase single output setup (Figure 20) and the
ambient temperature at 40°C. These output voltages are
chosen to include the lower and higher output voltage
ranges for correlating the thermal resistance. Thermal
models are derived from several temperature measure-
ments in a controlled temperature chamber along with
thermal modeling analysis. The junction temperatures
are monitored while ambient temperature is increased
with and without airflow. The power loss increase with
ambient temperature change is factored into the derating
Figure 8. Graphical Representation of JESD51-12 Thermal Coefficients
curves. The junctions are maintained at 120°C maximum
while lowering output current or power with increasing
ambient temperature. The decreased output current will
decrease the internal module loss as ambient tempera-
ture is increased. The monitored junction temperature of
120°C minus the ambient operating temperature speci-
fies how much module temperature rise can be allowed.
As an example in Figure 12 the load current is derated
to ~3A at ~100°C with no air or heat sink and the power
loss for the 5V to 1V at 3A output is about 0.95W. The
0.95W loss is calculated with the ~0.7W room tempera-
ture loss from the 5V to 1V power loss curve at 3A, and
the 1.35 multiplying factor at 120°C measured junction
temperature. If the 100°C ambient temperature is sub-
tracted from the 120°C junction temperature, then the
difference of 20°C divided by 0.95W equals a 20°C/W
θJA thermal resistance. Table 2 specifies a 19°C~20°C/W
value which is very close. Table 2 to 4 provide equivalent
thermal resistances for 1.0V, 1.5V, and 2.5V outputs with
and without airflow. The derived thermal resistances in
Table 2 to 4 for the various conditions can be multiplied
by the calculated power loss as a function of ambient
temperature to derive temperature rise above ambient,
thus maximum junction temperature. Room temperature
power loss can be derived from the efficiency curves
in the Typical Performance Characteristics section and
adjusted with the above ambient temperature multiplica-
tive factors. The printed circuit board is a 1.6mm thick
four layer board with two ounce copper for the two outer
layers and one ounce copper for the two inner layers. The
PCB dimensions are 95mm × 76mm.
4638 F08
µMODULE DEVICE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
JUNCTION
AMBIENT
CASE (BOTTOM)-TO-BOARD
RESISTANCE


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