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LR24C64 Scheda tecnica(PDF) 3 Page - Leshan Radio Company |
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LR24C64 Scheda tecnica(HTML) 3 Page - Leshan Radio Company |
3 / 15 page Pin Descriptions DEVICE/PAGE ADDRESSES (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the LR24C64. Eight 64K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-Read with any number of other open-drain or open- collector devices. SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. WRITE PROTECT (WP): The LR24C64 has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is connected to VCC, the write protection feature is enabled and operates as shown in the following Table 2. Table 2:Write Protect WP Pin Status Part of the Array Protected LR24C64 At Vcc Full(64K)Array At GND Normal Read/Write Operations Memory Organiation LRC6 6K SERIAL EEPROM: Internally organized with 256 pages of 32 bytes each, the 64K requires an 13-bit data word address for random word addressing. LESHAN RADIO COMPANY, LTD. 3/15 V2.1 |
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