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ACT8847_17 Scheda tecnica(PDF) 6 Page - Active-Semi, Inc |
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ACT8847_17 Scheda tecnica(HTML) 6 Page - Active-Semi, Inc |
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6 / 42 page  ACT8847 Rev 9, 27-June-17 Innovative PowerTM - 6 - www.active-semi.com Copyright © 2015-2017 Active-Semi, Inc. ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. PIN DESCRIPTIONS CONT’D PIN NAME DESCRIPTION 26 SW4 Switch Node for REG4. 27 GP14 Power Ground for REG1 and REG4. Connect GP14, GP2, GP3, and GA together at a single point as close to the IC as possible. 28 SW1 Switch Node for REG1. 29 OUT1 Output Voltage Sense for REG1. 30 VP1 Power Input for REG1. Bypass to GP14 with a high quality ceramic capacitor placed as close to the IC as possible. 31 nPBIN Master Enable Input. Drive nPBIN to GA through a 50kΩ resistor to enable the IC, drive nPBIN directly to GA to assert a Manual-Reset condition. 32 PWRHLD Power hold Input. PWRHLD is internally pulled down to GA through a 900kΩ resistor. 33 nRSTO Open-Drain Reset Output. 34 nIRQ Open-Drain Interrupt Output. 35 GPIO6 General Purpose I/O #6. Configured as PWM LED driver output for up to 6mA current with programmable frequency and duty cycle. See the PWM LED Drive section for more information. 36 GPIO5 General Purpose I/O #5. Configured as PWM LED driver output for up to 6mA current with programmable frequency and duty cycle. See the PWM LED Driver section for more information. 37 OUT13 REG13 output. Bypass it to ground with a 2.2µF capacitor. 38 OUT7 REG7 output. Bypass it to ground with a 2.2µF capacitor. 39 GPIO4 General Purpose I/O #4. Configured as PWM LED driver output for up to 6mA current with programmable frequency and duty cycle. See the PWM LED Driver section for more information. 40 OUT6 REG6 output. Bypass it to ground with a 2.2µF capacitor. 41 INL1 Power Input for REG5, REG6, REG7. 42 OUT5 REG5 output. Bypass it to ground with a 2.2µF capacitor. 43 GPIO3 General Purpose I/O #3. Configured as PWM LED driver output for up to 6mA current with programmable frequency and duty cycle. See the PWM LED Drier section for more information. 44 GPIO2 General Purpose I/O #2. Configured as VSELR4 for Voltage Selection of REG4. Drive to logic low to select default output voltage. Drive to logic high to select secondary output voltage. 45 GPIO1 General Purpose I/O #1. Configured as VSELR3 for Voltage Selection of REG3. Drive to logic low to select default output voltage. Drive to logic high to select secondary output voltage. 46 OUT3 Output Voltage Sense for REG3. 47,48 VP3 Power input for REG3. Bypass to GP3 with a high quality ceramic capacitor placed as close to the IC as possible. EP EP Exposed Pad. Must be soldered to ground on PCB. |
Codice articolo simile - ACT8847_17_06 |
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Descrizione simile - ACT8847_17_06 |
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