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ACT2861QI Scheda tecnica(PDF) 64 Page - Active-Semi, Inc |
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ACT2861QI Scheda tecnica(HTML) 64 Page - Active-Semi, Inc |
64 / 91 page ACT2861QI Rev 2.0, 27-Apr-2018 Innovative PowerTM www.active-semi.com ActiveSwitcherTM is a trademark of Active-Semi Copyright © 2018 Active-Semi, Inc. 64 REG 0x02: General Status (Read Only) (VM) Bit Name Description Comment 7 nVBAT_GOOD NA 0: Battery voltage is good 1: Battery voltage is lower than VBAT_GOOD Set bit when battery voltage is lower than VBAT_GOOD threshold in Charge Mode or OTG Mode This is not checked in HIZ Mode, so will be set to 0 in HIZ Mode. This read only register has a 16msec deglitch for rising and falling edge. 6 nIRQ_PIN_Status NA 0: Our device output drive HIZ 1: Our device output asserted Low Device status of IRQ output Not actual status of the IRQ pin – Open drain output so other devices could be driving the pin low in a wired OR configuration 5 nOTG_PIN_STATUS NA 0: nOTG Pin Low 1: nOTG Pin High Real time status of the nOTG Input PIN 4 INPUT_UVLO_CHG NA 0: Input above UVLO 1: Input below UVLO Charge Mode Only Real time status – For latched fault, see the Fault Registers 3 INPUT_OV_CHG NA 0: Input below OV 1: Input above OV Charge Mode Only Real time status – For latched fault, see the Fault Registers 2 GPIO_IN NA 0: GPIO Input Low 1: GPIO Input HI Real Time status of GPIO Pin. Only available in ACT2862, otherwise this register is always low 1 OPERATION_MODE[ 1] NA 00: HIZ Mode 01: Charger Mode 10: OTG Mode 11: not valid Current state machine status for overall system 0 OPERATION_MODE[0] NA |
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