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ACT2861QI Scheda tecnica(PDF) 17 Page - Active-Semi, Inc |
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ACT2861QI Scheda tecnica(HTML) 17 Page - Active-Semi, Inc |
17 / 91 page ACT2861QI Rev 2.0, 27-Apr-2018 Innovative PowerTM www.active-semi.com ActiveSwitcherTM is a trademark of Active-Semi Copyright © 2018 Active-Semi, Inc. 17 I2C INTERFACE ELECTRICAL CHARACTERISTICS (VIN = 12V, VBAT = 7.6V, TA = 25°C, unless otherwise specified.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT SCL, SDA Input Low VILO VIO = 1.8V 0.4 V SCL, SDA Input High VIHI VIO = 1.8V 1.25 V SDA Leakage Current IOH SDA = 5V 1 µA SDA Output Low VOL IOL = 5mA 0.4 V SCL Clock Frequency fSCL 0 1000 kHz SCL Low Period tSCL_LOW 0.5 us SCL High Period tSCL_HI 0.26 us SDA Data Setup Time tSU 50 ns SDA Data Hold Time tHD 0 ns Start Setup Time tST 260 ns Stop Setup Time tSP 260 ns Capacitance on SCL or SDA PIN CIN 10 pF Noise suppression on SCL and SDA tDEGLITCH 50 ns I2C Timeout Function tout Total time required for I2C communication to cause I2C state machine to reset 100 ms Note1: Comply with I2C timings for 1MHz operation - “Fast Mode Plus”. Note2: No internal timeout for I2C operations, however, I2C communication state machine will be reset when entering UV/POR State. Note3: This is an I2C system specification only. Rise and fall time of SCL & SDA not controlled by the IC. Note4: IC Address is factory configurable to 7’h24, 7’h66. Figure 2: I2C Data Transfer SDA SCL tST tSU tHD tSP tSCL Start condition Stop condition |
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