REV. 0

ADF7011

–5–

PIN CONFIGURATION

TOP VIEW

(Not to Scale)

24

23

22

21

20

19

18

17

16

15

14

13

1

2

3

4

5

6

7

8

9

10

11

12

TSSOP

ADF7011

MUXOUT

TxCLK

TxDATA

LE

CLK

CE

OSC2

OSC1

TEST

DATA

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

Function

External Resistor to Set Change Pump Current and Some Internal Bias Currents. Use 4.7 k

Ω as default:

I

R

CP MAX

SET

=

95

.

2

decoupled with a 0.1

µF capacitor as close to the pin as possible.

Charge Pump Ground.

Charge Pump Output. This output generates current pulses that are integrated in the loop filter. The

integrated current changes the control voltage on the input to the VCO.

5CEChip Enable. A logic low applied to this pin powers down the part. This must be high for the part to

function. This is the only way to power down the regulator circuit.

6

DATA

Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This is a

high impedance CMOS input.

7

CLK

Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched

into the 24-bit shift register on the CLK rising edge. This input is a high impedance CMOS input.

8LELoad Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one

of the four latches, the latch being selected using the control bits.

9

TxDATA

Digital data to be transmitted is input on this pin.

10

TxCLK

GFSK Only. This clock output is used to synchronize microcontroller data to the TxDATA pin of the

ADF7011. The clock is provided at the same frequency as the data rate.

11

MUXOUT

This multiplexer output allows either the digital lock detect (most common), the scaled RF, or the scaled

reference frequency to be accessed externally. Used commonly for system debug. See the Function Regis-

ter Map.

12

Ground Pin for the RF Digital Circuitry.

13

The Divided Down Crystal Reference with 50:50 Mark-Space Ratio. May be used to drive the clock

input of a microcontroller. To reduce spurious components in the output spectrum, the sharp edges can

be reduced with a series RC. For 4.8 MHz output clock, a series 50

Ω into 10 pF will reduce spurs to

< –50 dBc. Defaults on power-up to divide by 16.

14

OSC2

Oscillator Pin. If a single-ended reference (such as a TCXO) is used, it should be applied to this pin.

When using an external signal generator, a 51

Ω resistor should be tied from this pin to ground. The

XOE bit in the R register should set high when using an external reference.