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SLG46532 Scheda tecnica(PDF) 50 Page - Dialog Semiconductor |
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SLG46532 Scheda tecnica(HTML) 50 Page - Dialog Semiconductor |
50 / 184 page SLG46532_DS_108 Page 49 of 183 SLG46532 7.6.3 Matrix OE IO Structure (for Pins 8 and 9) Figure 5. Matrix OE IO Structure Diagram PAD 10 k 90 k 900 k Res_sel[1:0] 00: floating 01: 10 k 10: 100 k 11: 1 M Pin 8, Pin 9 Mode [2:0] 000: Digital Input without Schmitt Trigger 001: Digital Input with Schmitt Trigger 010: Low Voltage Digital Input 011: Reserved 100: Reserved 101: Open Drain NMOS 110: Reserved 111: Reserved Note: Digital Out and OE are Matrix output, Digital In is Matrix input Digital Out OE od1x_en Digital In Low Voltage Input Non-Schmitt Trigger Input Analog IO OE lv_en Schmitt Trigger Input OE smt_en OE wosmt_en |
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