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SLG46531 Scheda tecnica(PDF) 13 Page - Dialog Semiconductor |
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SLG46531 Scheda tecnica(HTML) 13 Page - Dialog Semiconductor |
13 / 170 page SLG46531_DS_109 Page 12 of 169 SLG46531 5.7 IDD Estimator 5.8 Timing Estimator Table 1. Typical Current estimated for each block Symbol Parameter Note VDD = 1.8 V VDD = 3.3V VDD = 5.0V Unit I Current Chip Quiescent 0.45 0.75 1.12 A OSC 2 MHz, predivide = 1 41.48 64.00 94.89 A OSC 2 MHz, predivide = 8 25.68 32.41 43.22 A OSC 25 kHz, predivide = 1 7.16 7.94 9.25 A OSC 25 kHz, predivide = 8 6.97 7.60 8.68 A OSC 25 MHz, predivide = 1 87.25 238.27 428.66 A OSC 25 MHz, predivide = 1, Force On 87.25 238.27 428.67 A OSC 25 MHz, predivide = 8 78.01 212.45 390.17 A ACMP (each) 54.96 52.64 60.81 A ACMP with buffer (each) 75.06 72.74 81.25 A Vref (each) 49.70 47.32 55.60 A Vref with Buffer (each) 71.93 71.27 79.62 A Table 2. Typical Delay estimated for each block Symbol Parameter Note VDD = 1.8 V VDD = 3.3V VDD = 5.0V Unit rising falling rising falling rising falling tpd Delay Digital Input without Schmitt Trigger 45 50 19 21 14 15 ns tpd Delay Digital Input with Schmitt Trigger 44 49 19 21 14 15 ns tpd Delay Low Voltage Digital input 46 447 19 195 14 134 ns tpd Delay Digital input-- PMOS 44 - 19 - 14 - ns tpd Delay Digital input-- NMOS - 81 - 30 - 20 ns tpd Delay Output enable from pin, OE Hi-Z to 1 48 - 20 - 15 - ns tpd Delay Output enable from pin, OE Hi-Z to 0 - 46 - 20 - 24 ns tpd Delay LUT2bit(LATCH) 34 33 14 13 10 9 ns tpd Delay LATCH(LUT2bit) 30 34 14 13 10 9 ns tpd Delay LUT3bit(LATCH) 38 37 18 15 13 10 ns tpd Delay LATCH+nRESET(LUT3bit) 45 42 21 17 15 12 ns tpd Delay LATCH 33 5 14 14 ns tpd Delay LUT4bit 28 33 14 13 10 9 ns tpd Delay LUT2bit 31 31 14 13 10 9 ns tpd Delay LUT3bit 35 33 15 13 11 10 ns tpd Delay CNT/DLY 62 68 27 29 19 20 ns tpd Delay DFF 32281412 11 9 ns tpd Delay P_DLY1C 626827291920 ns tpd Delay P_DLY2C 667 656 303 297 225 221 ns tpd Delay P_DLY3C 968 956 440 434 327 322 ns tpd Delay P_DLY4C 1265 1252 576 570 428 423 ns tpd Delay Filter 213 210 84 83 55 55 ns tpd Delay ACMP (5mV across inputs) 1600 1900 1500 1800 1600 1800 ns tw width I/O with 1X push pull (min transmitted) 20 20 20 20 20 20 ns |
Codice articolo simile - SLG46531 |
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Descrizione simile - SLG46531 |
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