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ATWINC3400 Scheda tecnica(PDF) 14 Page - ATMEL Corporation

Il numero della parte ATWINC3400
Spiegazioni elettronici  Single Chip IEEE 802.11 b/g/n Network Controller withIntegrated Bluetooth 4.0
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Produttore elettronici  ATMEL [ATMEL Corporation]
Homepage  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATWINC3400 Scheda tecnica(HTML) 14 Page - ATMEL Corporation

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ATWINC3400-Datasheet [PRELIMINARY DATASHEET]
Atmel-42396C-SmartConnect-ATWINC3400_Preliminary-Datasheet_07/2015
1
4
14
RTS-CTS and CTS-self support
Supports either STA or AP mode in the infrastructure basic service set mode
Supports independent basic service set (IBSS)
7.1.2
Description
The ATWILC3400 MAC is designed to operate at low power while providing high data throughput. The IEEE
802.11 MAC functions are implemented with a combination of dedicated data path engines, hardwired control
logic, and a low-power, high-efficiency microprocessor. The combination of dedicated logic with a
programmable processor provides optimal power efficiency and real-time response while providing the
flexibility to accommodate evolving standards and future feature enhancements.
Dedicated data path engines are used to implement data path functions with heavy computational. For
example, an FCS engine checks the CRC of the transmitting and receiving packets, and a cipher engine
performs all the required encryption and decryption operations for the WEP, WPA-TKIP, WPA2 CCMP-AES,
and WAPI security requirements.
Control functions which have real-time requirements are implemented using hardwired control logic modules.
These logic modules offer real-time response while maintaining configurability via the processor. Examples of
hardwired control logic modules are the channel access control module (implements EDCA/HCCA, Beacon TX
control, interframe spacing, etc.), protocol timer module (responsible for the Network Access Vector, back-off
timing, timing synchronization function, and slot management), MPDU handling module, aggregation/de-
aggregation module, block ACK controller (implements the protocol requirements for burst block
communication), and TX/RX control FSMs (coordinate data movement between PHY-MAC interface, cipher
engine, and the DMA interface to the TX/RX FIFOs).
The MAC functions implemented solely in software on the microprocessor have the following characteristics:
Functions with high memory requirements or complex data structures. Examples are association table
management and power save queuing
Functions with low computational load or without critical real-time requirements. Examples are
authentication and association
Functions which need flexibility and upgradeability. Examples are beacon frame processing and QoS
scheduling
7.2
PHY
7.2.1
Features
The ATWILC3400 IEEE802.11 PHY supports the following functions:
Single antenna 1x1 stream in 20MHz channels
Supports IEEE 802.11b DSSS-CCK modulation: 1, 2, 5.5, and 11Mbps
Supports IEEE 802.11g OFDM modulation: 6, 9, 12,18, 24, 36, 48, and 54Mbps
Supports IEEE 802.11n HT modulations MCS0-7, 20MHz, 800 and 400ns guard interval: 6.5, 7.2, 13.0,
14.4, 19.5, 21.7, 26.0, 28.9, 39.0, 43.3, 52.0, 57.8, 58.5, 65.0, and 72.2Mbps
IEEE 802.11n mixed mode operation
Per packet TX power control
Advanced channel estimation/equalization, automatic gain control, CCA, carrier/symbol recovery, and
frame detection


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