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TS19730CX6 Scheda tecnica(PDF) 5 Page - Taiwan Semiconductor Company, Ltd |
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TS19730CX6 Scheda tecnica(HTML) 5 Page - Taiwan Semiconductor Company, Ltd |
5 / 7 page TS19730CX6 Taiwan Semiconductor 5 Version: B1601 APPLICATION INFORMATION Start-up Current The typical start-up current is around 45μA. Very low start-up current allows the PWM controller to increase the value of start-up resistor and then reduce the power dissipation. UVLO(Under Voltage Lockout) A hysteresis UVLO comparator is implemented in TS19730. The turn-on and turn-off thresholds level are fixed at 17.5V and 8V respectively. This hysteresis shown in Fig.3 ensures that the start-up capacitor will be adequate to supply the chip during start-up. For quick start-up of the LED driver, the start-up resistor should be matched with the start-up capacitor. LEB(Leading-Edge Blanking) Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense resistor. To avoid fault trigger, a 400ns leading-edge blanking time is built in. Conventional RC filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and cannot switch off the gate driver. OCP(Over Current Protection) The TS19730 has built-in cycle by cycle over current protection function on CL pin. As the CL pin voltage is larger than VOCP (0.3V), the gate output will be turned off immediately to avoid the driver board to be burned out. Application Information (Continue) OVP (Over Voltage Protection) on VCC To prevent the LED driver from being damaged, the TS19730 has an implemented OVP function on VCC. When the VCC voltage is higher than the VOVP (31V), the output gate driver circuit will be shut down immediately to stop the switching of power MOSFET. The VCC pin OVP function is an auto recovery type protection. If the OVP condition happens, the pulses will be stopped until the VCC pin voltage is down to the UVLO off level. The TS19730 is working in an auto-recovery mode as shown in Fig. 4. Gate Clamp Driver is clamped to 12.5V by an internal clamping circuit to avoid the Gate of MOSFET to get damaged. Fig. 3 Fig. 4 |
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