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MRF89XA Scheda tecnica(PDF) 97 Page - Microchip Technology |
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MRF89XA Scheda tecnica(HTML) 97 Page - Microchip Technology |
97 / 140 page 2010-2017 Microchip Technology Inc. Preliminary DS70000622D-page 97 MRF89XA 4.5.2 SUGGESTED PA BIASING AND MATCHING The recommended PA bias and matching circuit is illustrated in Figure 4-5. FIGURE 4-5: RECOMMENDED PA BIASING AND OUTPUT MATCHING Refer to Section 4.8, Bill of Materials for the opti- mized matching arrangement for each frequency band. 4.5.3 COMMON INPUT AND OUTPUT FRONT-END The Receiver and Transmitter share the same RFIO pin (pin 31). Figure 4-6 illustrates the configuration of the common RF front-end. In Transmit mode, the PA and the PA regulator are active, with the voltage on the PARS pin equal to the nominal voltage of the regulator (1.8V). The external inductance is used to bias the PA. In Receive mode, both the PA and the PA regulator are OFF and PARS is tied to the ground. The RF choke inductor is then used to bias the LNA. FIGURE 4-6: FRONT-END DESCRIPTION PARS RFIO 100 nH 0.047 µF SAW Low-pass and DC block PA Antenna port DC block 1W 1% RFIO PARS PA PA RX ON LNA To Antenna Regulator (1.8V) |
Codice articolo simile - MRF89XA |
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Descrizione simile - MRF89XA |
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