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MRF89XA Scheda tecnica(PDF) 34 Page - Microchip Technology |
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MRF89XA Scheda tecnica(HTML) 34 Page - Microchip Technology |
34 / 140 page MRF89XA DS70000622D-page 34 Preliminary 2010-2017 Microchip Technology Inc. 2.14.7 R1 COUNTER SET REGISTER DETAILS REGISTER 2-7: R1CREG: R1 COUNTER SET REGISTER (ADDRESS:0x06) (POR:0x77) 2.14.8 P1 COUNTER SET REGISTER DETAILS REGISTER 2-8: P1CREG: P1 COUNTER SET REGISTER (ADDRESS:0x07) (POR:0x64) R/W-0 R/W-1 R/W-1 R/W-1 R/W-0 R/W-1 R/W-1 R/W-1 R1CVAL<7:0> bit 7 bit 0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown r = Reserved bit 7-0 R1CVAL<7:0>: R1 Value bits These bits indicate the value in R1 counter to generate carrier frequencies in FSK mode. R1CVAL<7:0> = 0x77 (default) R1CVAL is activated if RPS = 0 in GCONREG. Also, default values R1, P1, and S1 generate 915 MHz in FSK Mode. R/W-0 R/W-1 R/W-1 R/W-0 R/W-0 R/W-1 R/W-0 R/W-0 P1CVAL<7:0> bit 7 bit 0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown r = Reserved bit 7-0 P1CVAL<7:0>: P1 Value bits These bits indicate the value in P1 counter to generate carrier frequencies in FSK mode. P1CVAL<7:0> = 0x64 (default) P1CVAL is activated if RPS = 0 in GCONREG. Also, default values R1, P1, and S1 generate 915 MHz in FSK Mode. |
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